Aldec, Inc - The Design Verification Company | |
FPGA & ASIC - Electronic Design Verification and Simulation Software for SystemC, VHDL, Verilog, SystemVerilog, Assertions, EDIF, MATLAB/Simulink | |
Keywords : fpga, asic, electronic, design, verification, simulation, vhdl, verilog, systemverilog, system c, edif, assertions, state machine, block diagaram, schematic, lint, encryption, hdl, emulation, acceleration |
Last Update : | 02/January/2012 |
Google PR : | N/A |
Internal links : | 36 |
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